公开(公告)号：US20250029886A1

公开(公告)日：2025-01-23

申请号：US18604875

申请日：2024-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam KANG ,  Chilwoo KWON ,  Hyejin KIM ,  Okgyeong PARK

IPC: H01L23/367 ,  H01L23/00 ,  H01L23/373 ,  H01L25/18

Abstract: A semiconductor package includes: a first semiconductor chip disposed on a package substrate; a second semiconductor chip adjacent to the first semiconductor chip in a horizontal direction and disposed on the package substrate; a plurality of first thermal interfacial material patterns overlapping the first semiconductor chip in a vertical direction; a plurality of second thermal interfacial material patterns overlapping the second semiconductor chip in the vertical direction; and a first non-metal thermal conductive layer disposed between the plurality of first thermal interfacial material patterns, wherein the plurality of first thermal interfacial materials are spaced apart from the plurality of second thermal interfacial materials in the horizontal direction, and a thermal conductivity of the first non-metal thermal conductive layer in the horizontal direction is lower than a thermal conductivity of the first non-metal thermal conductive layer in the vertical direction.

公开(公告)号：US20250046755A1

公开(公告)日：2025-02-06

申请号：US18740075

申请日：2024-06-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myungsam KANG ,  Chilwoo KWON ,  Okgyeong PARK

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L23/64 ,  H10B80/00

Abstract: A semiconductor package includes a ceramic substrate having a cavity, a lower redistribution structure on a lower surface of the ceramic substrate and electrically connected to the ceramic substrate, an upper redistribution structure on an upper surface of the ceramic substrate and electrically connected to the ceramic substrate, a plurality of semiconductor chips arranged in a first direction on the upper redistribution structure, and a bridge chip structure in the cavity of the ceramic substrate and including a bridge chip electrically connecting the plurality of semiconductor chips to each other.

公开(公告)号：US20200273817A1

公开(公告)日：2020-08-27

申请号：US16703239

申请日：2019-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gyujin CHOI ,  Sunghoan KIM ,  Changeun JOO ,  Chilwoo KWON ,  Youngkyu LIM ,  Sunguk LEE

IPC: H01L23/00 ,  H01L21/66 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L23/538

Abstract: The method of manufacturing a connection structure of a semiconductor chip includes: preparing a semiconductor chip having a first surface having a connection pad disposed thereon and a second surface opposing the first surface and including a passivation layer disposed on the first surface and covering the connection pad; forming an insulating layer on the first surface of the semiconductor chip, the insulating layer covering at least a portion of the passivation layer; forming a via hole penetrating through the insulating layer to expose at least a portion of the passivation layer; exposing at least a portion of the connection pad by removing the passivation layer exposed by the via hole; forming a redistribution via by filling the via hole with a conductive material; and forming a redistribution layer on the redistribution via and the insulating layer.