公开(公告)号：US20240177746A1

公开(公告)日：2024-05-30

申请号：US18209057

申请日：2023-06-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chinam Kim ,  Tae-Kyeong Ko ,  Cholmin Kim

IPC: G11C7/10

CPC classification number: G11C7/1039 ,  G11C7/1069 ,  G11C7/1096

Abstract: A semiconductor memory system includes a memory device including plural banks, and a memory controller that generates an offset address for a first bank among the plural banks and a command indicating the offset address, based on a first request. The memory device generates a first address by adding the offset address to a base address for the first bank, according to the command, and performs a memory operation on the first address of the first bank according to the command.