公开(公告)号：US20210091045A1

公开(公告)日：2021-03-25

申请号：US16877169

申请日：2020-05-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNYEONG HEO ,  JAE-EUN LEE ,  YEONGKWON KO ,  DONGHOON WON

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/31

Abstract: A semiconductor package is provided including a first semiconductor chip stack and a second semiconductor chip stack that are adjacent to each other. The first semiconductor chip stack includes a plurality of first semiconductor chips and a plurality of first adhesive layers. The second semiconductor chip stack includes a plurality of second semiconductor chips and a plurality of second adhesive layers. Each of the first semiconductor chips includes a first cell region and a first scribe lane that surrounds the first cell region. Each of the second semiconductor chips includes a second cell region and a second scribe lane that surrounds the second cell region. An area of the first scribe lane is greater than an area of the second scribe lane. The plurality of first adhesive layers and the plurality of second adhesive layers have the same coefficient of thermal expansion.