Fan-out semiconductor package
    1.
    发明授权

    公开(公告)号:US10403583B2

    公开(公告)日:2019-09-03

    申请号:US15938596

    申请日:2018-03-28

    Inventor: Da Hee Kim

    Abstract: A fan-out semiconductor package includes: a semiconductor chip; a first connection member including a plurality of redistribution layers and one or more layer of vias; an encapsulant; and a second connection member, wherein the encapsulant has first openings exposing at least portions of the first connection member, the first connection member has second openings exposing at least portions of a redistribution layer disposed at an uppermost portion among the plurality of redistribution layers, at least portions of the first openings and the second openings overlap each other, and a content of a metal constituting the plurality of redistribution layers and the one or more layer of vias is higher in a lower portion of the first connection member than in an upper portion of the first connection member.

    Fan-out semiconductor package
    2.
    发明授权

    公开(公告)号:US10770418B2

    公开(公告)日:2020-09-08

    申请号:US15916785

    申请日:2018-03-09

    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; a resin layer disposed on the encapsulant; and a rear redistribution layer embedded in the encapsulant so that one surface thereof is exposed by the encapsulant, wherein the resin layer covers at least portions of the exposed one surface of the rear redistribution layer, and the rear redistribution layer is electrically connected to the redistribution layer of the first connection member through connection members formed in first openings penetrating through the resin layer and the encapsulant.

    Fan-out semiconductor package
    3.
    发明授权

    公开(公告)号:US10522451B2

    公开(公告)日:2019-12-31

    申请号:US16035192

    申请日:2018-07-13

    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip.

    Semiconductor package
    4.
    发明授权

    公开(公告)号:US10692805B2

    公开(公告)日:2020-06-23

    申请号:US16171047

    申请日:2018-10-25

    Inventor: Da Hee Kim

    Abstract: A semiconductor package includes a semiconductor chip having a first surface on which connection pads are disposed and a second surface opposing the first surface; a connection member including a first insulating layer disposed on the first surface of the semiconductor chip, a wiring pattern disposed on the first insulating layer and having a top surface of which an edge is rounded, a via penetrating through the first insulating layer and electrically connecting the connection pads to the wiring pattern, and a second insulating layer disposed on the first insulating layer and covering the wiring pattern; and an encapsulant disposed on the connection member and encapsulating the semiconductor chip.

    FAN-OUT SEMICONDUCTOR PACKAGE
    5.
    发明申请

    公开(公告)号:US20200091054A1

    公开(公告)日:2020-03-19

    申请号:US16683424

    申请日:2019-11-14

    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip.

    Fan-out semiconductor package
    6.
    发明授权

    公开(公告)号:US11121066B2

    公开(公告)日:2021-09-14

    申请号:US16683424

    申请日:2019-11-14

    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole of the first connection member and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; and a heat dissipation layer embedded in the encapsulant so that one surface thereof is exposed. The first connection member and the second connection member include, respectively, redistribution layers electrically connected to the connection pads of the semiconductor chip.

    Fan-out semiconductor package
    7.
    发明授权

    公开(公告)号:US10573613B2

    公开(公告)日:2020-02-25

    申请号:US15404813

    申请日:2017-01-12

    Abstract: A fan-out semiconductor package includes: a first connection member having a through-hole; a semiconductor chip disposed in the through-hole and having an active surface having connection pads disposed thereon and an inactive surface opposing the active surface; an encapsulant encapsulating at least portions of the first connection member and the inactive surface of the semiconductor chip; a second connection member disposed on the first connection member and the active surface of the semiconductor chip; a resin layer disposed on the encapsulant; and a rear redistribution layer embedded in the encapsulant so that one surface thereof is exposed by the encapsulant, wherein the resin layer covers at least portions of the exposed one surface of the rear redistribution layer, and the rear redistribution layer is electrically connected to the redistribution layer of the first connection member through connection members formed in first openings penetrating through the resin layer and the encapsulant.

    Fan-out semiconductor package
    8.
    发明授权

    公开(公告)号:US10402620B2

    公开(公告)日:2019-09-03

    申请号:US15981311

    申请日:2018-05-16

    Abstract: A fan-out semiconductor package includes: a core member including a support layer, a first wiring layer, a second wiring layer, and through-vias and having a through-hole; a semiconductor chip disposed in the through-hole; an encapsulant covering the core member and the semiconductor chip and filling at least portions of the through-hole; a connection member including an insulating layer disposed on the first wiring layer and the semiconductor chip, a redistribution layer disposed on the insulating layer, first vias electrically connecting the redistribution layer and the connection pads to each other, and second vias electrically connecting the redistribution layer and the first wiring layer to each other; and a passivation layer disposed on the insulating layer and covering the redistribution layer, wherein a thickness of the passivation layer is within half a distance from an inactive surface of the semiconductor chip to a lower surface of the encapsulant.

Patent Agency Ranking