公开(公告)号：US09224619B2

公开(公告)日：2015-12-29

申请号：US14502345

申请日：2014-09-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seol-Min Yi ,  Dae-Hyun Moon ,  Joon-Seok Moon ,  Se-Keun Park ,  Hyeoung-Won Seo

IPC: H01L29/66 ,  H01L21/3213 ,  H01L29/423 ,  H01L27/108 ,  H01L27/22 ,  H01L21/28 ,  H01L29/49

CPC classification number: H01L21/32133 ,  H01L21/28088 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/228 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/4966

Abstract: The semiconductor device includes a substrate, a trench formed in the substrate, a gate insulation layer conformally formed on the inner surface of the trench, buried gate electrodes formed on the gate insulation layer and filling a portion of the trench, and a capping layer formed on the buried gate electrodes and filling the trench. The buried gate electrode include a first gate electrode and a second gate electrode surrounding a bottom portion of the first gate electrode, and an air gap is provided between a top portion of the first gate electrode and the gate insulation layer.

Abstract translation: 半导体器件包括衬底，形成在衬底中的沟槽，保形地形成在沟槽的内表面上的栅极绝缘层，形成在栅极绝缘层上并填充沟槽的一部分的掩埋栅电极和形成的覆盖层 在掩埋的栅极电极上并填充沟槽。 掩埋栅电极包括第一栅电极和围绕第一栅电极的底部的第二栅电极，并且在第一栅电极的顶部与栅极绝缘层之间设置气隙。