公开(公告)号：US11764140B2

公开(公告)日：2023-09-19

申请号：US17391164

申请日：2021-08-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Uk Han ,  Duck Gyu Kim ,  Min Ki Kim ,  Jae-Min Jung ,  Jeong-Kyu Ha

IPC: H01L23/58 ,  H01L23/498

CPC classification number: H01L23/49838 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/585

Abstract: A semiconductor device includes: a substrate including a semiconductor chip region, a guard ring region adjacent to the semiconductor chip region, and an edge region adjacent to the guard ring region; a first interlayer insulating layer disposed on the substrate; a wiring structure disposed inside the first interlayer insulating layer and in the guard ring region, wherein the wiring structure includes a first wiring layer and a second wiring layer disposed above the first wiring layer; and a trench configured to expose at least a part of the first interlayer insulating, layer in the edge region, wherein the trench includes a first bottom surface and a second bottom surface formed at a level different from that of the first bottom surface, wherein the first bottom surface is formed between the wiring structure and the second bottom surface, and the second bottom surface is formed adjacent to the first bottom surface.