公开(公告)号：US20250133738A1

公开(公告)日：2025-04-24

申请号：US18661467

申请日：2024-05-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chulmin Choi ,  Changhee Lee ,  Dajin Kim ,  Jiwoong Kim ,  Tae Hun Kim ,  Sang-Yong Park ,  Seung Jae Baik ,  Gun-Wook Yoon ,  Jaeduk Lee

IPC: H10B43/27 ,  H01L25/065 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/41 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40 ,  H10B80/00

Abstract: A semiconductor device includes a gate stack with alternating conductive patterns and insulating patterns. The device also includes a first memory channel structure including a first channel layer enclosed by the gate stack and a first memory layer enclosing the first channel layer. The device also includes a source structure electrically connected to the first channel layer. The source structure includes several source layers stacked atop one another. The first channel layer is in physical contact with the second source layer but apart from the other source layers. The first source layer contains impurities of a first conductivity type. The second source layer is formed of an impurity-free material. The third source layer contains impurities of a second conductivity type different from the first conductivity type.