公开(公告)号：US20200066639A1

公开(公告)日：2020-02-27

申请号：US16205164

申请日：2018-11-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Ean LEE ,  Han Na JIN ,  Tae Sung JEONG ,  Young Gwan KO ,  Jung Soo BYUN

IPC: H01L23/532 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/18

Abstract: A semiconductor package including an organic interposer includes: a semiconductor chip; a connection member on the semiconductor chip and including a pad layer, a redistribution layer, and an insulating layer; a bonding member between the semiconductor chip and the pad layer; a surface treatment layer on the pad layer and including at least one metal layer; and an under-bump metallurgy (UBM) layer embedded in the connection member. The UBM layer includes a UBM pad, at least one plating layer on the UBM pad, and a UBM via. The surface treatment layer is disposed only on one surface of the pad layer, the plating layer are is disposed only on one surface of the UBM pad, and at least a portion of a side surface of the plating layer is spaced apart from a side surface of the insulating layer surrounding the plating layer.

公开(公告)号：US20190366690A1

公开(公告)日：2019-12-05

申请号：US16157701

申请日：2018-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Han Na JIN

IPC: B32B17/06 ,  H05K3/38 ,  H05K3/06 ,  H05K3/28 ,  H05K1/03 ,  H05K1/09

Abstract: A carrier substrate includes a core layer, a first metal layer disposed on the core layer, and a plurality of unit pattern portions disposed on the first metal layer. The plurality of unit pattern portions each have a planar area smaller than a planar area of the first metal layer. The plurality of unit pattern portions each include a second metal layer disposed on the first metal layer, a release layer disposed on the second metal layer, and a third metal layer disposed on the release layer.