公开(公告)号：US20200266137A1

公开(公告)日：2020-08-20

申请号：US16867004

申请日：2020-05-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Ean LEE ,  Tae Sung JEONG ,  Young Gwan KO ,  Suk Ho LEE ,  Jung Soo BYUN

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48

Abstract: A semiconductor package includes a semiconductor chip; a connection member having a first surface on which the semiconductor chip is disposed and a second surface opposing the first surface, an encapsulant disposed on the first surface of the connection member and encapsulating the semiconductor chip, a passivation layer on the second surface of the connection member; and an UBM layer partially embedded in the passivation layer, wherein the UBM layer includes an UBM via embedded in the passivation layer and connected to the redistribution layer of the connection member and an UBM pad connected to the UBM via and protruding from a surface of the passivation layer, and a width of a portion of the UBM via in contact with the UBM pad is narrower than a width of a portion of the UBM via in contact with the redistribution layer.

公开(公告)号：US20200066639A1

公开(公告)日：2020-02-27

申请号：US16205164

申请日：2018-11-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Ean LEE ,  Han Na JIN ,  Tae Sung JEONG ,  Young Gwan KO ,  Jung Soo BYUN

IPC: H01L23/532 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L25/18

Abstract: A semiconductor package including an organic interposer includes: a semiconductor chip; a connection member on the semiconductor chip and including a pad layer, a redistribution layer, and an insulating layer; a bonding member between the semiconductor chip and the pad layer; a surface treatment layer on the pad layer and including at least one metal layer; and an under-bump metallurgy (UBM) layer embedded in the connection member. The UBM layer includes a UBM pad, at least one plating layer on the UBM pad, and a UBM via. The surface treatment layer is disposed only on one surface of the pad layer, the plating layer are is disposed only on one surface of the UBM pad, and at least a portion of a side surface of the plating layer is spaced apart from a side surface of the insulating layer surrounding the plating layer.

公开(公告)号：US20210151370A1

公开(公告)日：2021-05-20

申请号：US17162015

申请日：2021-01-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ik Jun CHOI ,  Jae Ean LEE ,  Kwang Ok JEONG ,  Young Gwan KO ,  Jung Soo BYUN

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/528 ,  H01L21/48 ,  H01L23/522 ,  H01L21/56 ,  H01L23/00

Abstract: A method for manufacturing a semiconductor package includes disposing a semiconductor chip having contact pads, and a connection structure around the semiconductor chip on a supporting substrate, with the contact pads facing the supporting substrate, forming an encapsulant encapsulating the semiconductor chip and the connection structure on the supporting substrate, embedding a wiring pattern having a connection portion in the encapsulant, the connection portion having a connection hole, forming a through hole penetrating the encapsulant in the connection hole, the through hole exposing a portion of an upper surface of the connection structure, and forming a conductive via in the through hole, the conductive via connecting the wiring pattern to the connection structure.