公开(公告)号：US20170053696A1

公开(公告)日：2017-02-23

申请号：US15221875

申请日：2016-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Han-Wool JEONG ,  Woo-Jin RIM ,  Tae-Joong SONG ,  Seong-Ook JUNG ,  Gyu-Hong KIM

IPC: G11C11/419

CPC classification number: G11C11/419 ,  G11C7/18 ,  G11C2207/002

Abstract: Provided is a semiconductor memory device. The semiconductor memory device includes: a memory cell; a sensing circuit connected to the memory cell via a first bit line and a second bit line different from the first bit line, the sensing circuit configured to sense data stored in the memory cell; and a bit line voltage control circuit connected to the memory cell via the first bit line and the second bit line, the bit line voltage control circuit configured to precharge the first bit line to a first voltage that is lower than a supply voltage and to precharge the second bit line to a second voltage that is lower than the supply voltage and is different from the first voltage.

Abstract translation: 提供了一种半导体存储器件。 半导体存储器件包括：存储单元; 感测电路经由第一位线和与第一位线不同的第二位线连接到存储单元，感测电路被配置为感测存储在存储单元中的数据; 以及位线电压控制电路，经由第一位线和第二位线连接到存储单元，位线电压控制电路被配置为将第一位线预充电到低于电源电压的第一电压，并预充电 所述第二位线到低于所述电源电压并且与所述第一电压不同的第二电压。