公开(公告)号：US12086073B2

公开(公告)日：2024-09-10

申请号：US17732580

申请日：2022-04-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heechul Chae

IPC: G06F12/1009 ,  G06F3/06 ,  G06F9/54 ,  G06F12/02

CPC classification number: G06F12/1009 ,  G06F3/0607 ,  G06F3/0652 ,  G06F3/0658 ,  G06F3/0659 ,  G06F9/544 ,  G06F12/0246 ,  G06F3/0679

Abstract: A storage device includes a nonvolatile memory device and a memory controller. After writing first data at the first page, the memory controller writes second data at a second page. The memory controller generates first check data corresponding to the first data and second check data corresponding to the second data. The memory controller recovers the first and second physical addresses and the first and second logical addresses based on the second check data.

公开(公告)号：US12093185B2

公开(公告)日：2024-09-17

申请号：US17827850

申请日：2022-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heechul Chae

IPC: G06F12/1009 ,  G06F3/06 ,  G06F9/54 ,  G06F12/02

CPC classification number: G06F12/1009 ,  G06F3/0607 ,  G06F3/0652 ,  G06F3/0658 ,  G06F3/0659 ,  G06F9/544 ,  G06F12/0246 ,  G06F3/0679

Abstract: A storage device includes a nonvolatile memory device and a memory controller. After writing first data at the first page, the memory controller writes second data at a second page. The memory controller generates first check data corresponding to the first data and second check data corresponding to the second data. The memory controller recovers the first and second physical addresses and the first and second logical addresses based on the second check data.

公开(公告)号：US11347654B2

公开(公告)日：2022-05-31

申请号：US16533901

申请日：2019-08-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Heechul Chae

IPC: G06F12/1009 ,  G06F12/02 ,  G06F3/06 ,  G06F9/54

Abstract: A storage device includes a nonvolatile memory device and a memory controller. After writing first data at the first page, the memory controller writes second data at a second page. The memory controller generates first check data corresponding to the first data and second check data corresponding to the second data. The memory controller recovers the first and second physical addresses and the first and second logical addresses based on the second check data.

公开(公告)号：US10824564B2

公开(公告)日：2020-11-03

申请号：US16007667

申请日：2018-06-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yu-hun Jun ,  Sil Wan Chang ,  Heechul Chae ,  Seontaek Kim ,  In Hwan Doh

IPC: G06F12/08 ,  G06F12/0811 ,  G06F3/06

Abstract: An operation method of a memory controller which is configured to control a nonvolatile memory device includes receiving a command from the outside, calculating a delay time based on a currently available write buffer, a previously available write buffer, and a reference value, and processing the command based on the delay time.