公开(公告)号：US20190131139A1

公开(公告)日：2019-05-02

申请号：US15984614

申请日：2018-05-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： In Wook OH ,  Dong Hyun KIM ,  Byung Sung KIM ,  Sung Keun PARK ,  Ho Jun CHOI

IPC: H01L21/308 ,  G06F17/50 ,  H01L21/8234

Abstract: A method of generating a layout and manufacturing a semiconductor device, including receiving a design layout of a semiconductor device including active fins; extracting a design rule of the active fins from the design layout; forming fin lines overlapping the active fins such that the fin lines have a length that is greater than a length of the active fins, wherein the fin lines continuously extend from a position adjacent to one edge of a layout region of the semiconductor device toward another edge, and are formed in an entirety of the layout region of the semiconductor device; forming a mandrel pattern layout in an entirety of the layout region of the semiconductor device, using the fin lines; and forming a cut pattern layout in the entirety of the layout region of the semiconductor device, using the active fins.