公开(公告)号：US20230084539A1

公开(公告)日：2023-03-16

申请号：US17689049

申请日：2022-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hwang LEE ,  Jung Min Seo ,  Wan Heo

IPC: G06F12/02 ,  G06F12/06 ,  G06F13/16

Abstract: A computational storage device is provided. The computation storage device includes: a nonvolatile memory configured to store data; and a storage controller configured to control a plurality of applications to be executed based on the data. The storage controller includes: a processor; and a memory including a program slot configured to store a user program. The processor is configured to drive an operating system to execute the user program to control an application among the plurality of applications to perform a first operation on the data based on an event signal.

公开(公告)号：US20220382472A1

公开(公告)日：2022-12-01

申请号：US17816751

申请日：2022-08-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wan HEO ,  Satish KUMAR ,  Hwang LEE ,  Byounggeun KIM ,  Chansoo KIM ,  Sangyoon OH

IPC: G06F3/06

Abstract: Provided are a storage device storing data on the basis of key-value and an operating method thereof, wherein the storage device separates and manages a plurality of keys and a plurality of values respectively corresponding to the plurality of keys, and includes a first controller processing a first key and a first value corresponding to the first key, a second controller processing a second key and a second value corresponding to the second key, and a nonvolatile memory storing the first key, the second key, the first value, and the second value, wherein the first key includes information about the second controller regarding a processing core for the second value processed next to the first value.

公开(公告)号：US20230229357A1

公开(公告)日：2023-07-20

申请号：US18126595

申请日：2023-03-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hwang LEE ,  Wan HEO

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0679 ,  G06F3/0613 ,  G06F3/0656 ,  G06F3/0658

Abstract: A computational storage device includes a non-volatile memory (NVM) device; and a storage controller configured to control the NVM device. The storage controller includes: a computation processor configured to execute an internal application to generate an internal command; a host interface circuit configured to receive a host command from an external host device, to receive the internal command from the computation processor, and to individually process the received host command and the received internal command; a flash translation layer (FTL) configured to perform an address mapping operation based on a result of the processing of the host interface circuit; and a memory interface circuit configured to control the NVM device based on the address mapping operation of the FTL.