公开(公告)号：US20190164776A1

公开(公告)日：2019-05-30

申请号：US16123262

申请日：2018-09-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyung-In CHOI ,  Sang-Hoon HAN ,  Sun-Jung KIM ,  Tae-Gon KIM ,  Hyun-Chul SONG

IPC: H01L21/3115 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/311 ,  H01L21/265 ,  H01L21/02

Abstract: A method of manufacturing a semiconductor device, the method including forming dummy gate structures on a substrate; forming spacers on sidewalls of the dummy gate structures; forming a preliminary first interlayer insulation pattern to fill a gap between adjacent spacers; etching an upper portion of the preliminary first interlayer insulation pattern through a first etching process to form a preliminary second interlayer insulation pattern; implanting an ion on the dummy gate structures, the spacers, and the preliminary second interlayer insulation pattern through an ion-implanting process; etching an upper portion of the preliminary second interlayer insulation pattern through a second etching process to form an interlayer insulation pattern having a flat upper surface; and forming a capping pattern on the interlayer insulation pattern to fill a gap between the spacers.