公开(公告)号：US12260923B2

公开(公告)日：2025-03-25

申请号：US17820280

申请日：2022-08-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunee Lee ,  Jongyeol Park

IPC: G11C29/12 ,  G11C8/12 ,  G11C16/04 ,  G11C16/08 ,  G11C16/34

Abstract: A nonvolatile memory device includes a memory cell array, an address decoder, a leakage detector and a control circuit. The memory cell array includes a plurality of mats corresponding to different bit-lines. The leakage detector is commonly coupled to the plurality of mats at a sensing node in the address decoder. The control circuit performs a first leakage detection operation on M mats selected from the mats to determine a leakage of at least a portion of word-lines of the M mats in an N multi-mat mode, in response to the leakage of at least the portion of word-lines of the M mats being detected based on a result of the first leakage detection operation, inhibits at least one mat of the M mats, and performs a second leakage detection operation on at least one target mat from among the M mats except the inhibited mat.