LDO REGULATOR CAPABLE OF BEING OPERATED AT LOW VOLTAGE AND SEMICONDUCTOR DEVICE INCLUDING THE SAME

    公开(公告)号:US20240053783A1

    公开(公告)日:2024-02-15

    申请号:US18342415

    申请日:2023-06-27

    CPC classification number: G05F1/575 G05F1/565 G05F3/247

    Abstract: A low dropout (LDO) regulator includes: one or more power transistors configured to dispose between an input node and an output node, wherein the input node is a node to which an input voltage is applied and the output node is a node from which an output voltage is output; a voltage comparing unit configured to generate a comparative signal based on a difference between the output voltage and a first reference voltage; a digital control unit configured to generate a control signal for gating of the one or more power transistors in response to the comparative signal; and a gate driving unit configured to output a gating signal for the one or more power transistors in response to the control signal, wherein the gating signal is corresponding to one of the input voltage and a negative of the input voltage.

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