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公开(公告)号:US20220157382A1
公开(公告)日:2022-05-19
申请号:US17523337
申请日:2021-11-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: JAEHO AHN , JIWON KIM , SUNGMIN HWANG , JOONSUNG LIM , SUKKANG SUNG
IPC: G11C16/10 , H01L23/48 , G11C16/26 , H01L27/11524 , H01L27/11526 , H01L27/11556 , H01L27/1157 , H01L27/11573 , H01L27/11582
Abstract: A semiconductor memory device includes: a semiconductor substrate having a first surface and a second surface opposing each other; a back-side insulating layer below the second surface of the semiconductor substrate; an external input/output conductive pattern below the back-side insulating layer; a circuit device including a gate electrode and a source/drain region, on the first surface of the semiconductor substrate; an internal input/output conductive pattern on the first surface of the semiconductor substrate, the internal input/output conductive pattern having at least a portion disposed on the same level as at least a portion of the gate electrode; a through-electrode structure penetrating through the semiconductor substrate and the back-side insulating layer and electrically connected to the internal input/output conductive pattern and the external input/output conductive pattern; and a memory cell array region disposed on a level higher than the circuit device, on the first surface of the semiconductor substrate.