公开(公告)号：US20240036119A1

公开(公告)日：2024-02-01

申请号：US18206347

申请日：2023-06-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYUTAE KIM ,  SungHyun YOON ,  JONGHOON KIM ,  SANGUK KWON ,  JEONGHO AHN

IPC: G01R31/392 ,  G01R31/367

CPC classification number: G01R31/392 ,  G01R31/367

Abstract: A battery life prediction device, including a state data generator configured to receive information about a battery in real time and to generate state-of-health data; a state data storage configured to store the state-of-health data and past state data; and a battery life calculator configured to: generate a health state model based on the past state data, generate state prediction data based on the state-of-health data using the health state model, determine whether to modify the health state model based on the state prediction data and the state-of-health data, and calculate a remaining life of the battery, wherein the generating of the health state model includes generating an initial model including a non-linear function, determining an initial model coefficient using a least squares approximation based on the past state data, and generating the health state model based on the initial model coefficient and the initial model

公开(公告)号：US20250087293A1

公开(公告)日：2025-03-13

申请号：US18883687

申请日：2024-09-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JINSEONG YUN ,  Daehyun KWON ,  KI-HEUNG KIM ,  JONGHOON KIM ,  Sunghak LEE ,  CHANG-YONG LEE

IPC: G11C29/56

Abstract: A memory module includes: a circuit board including a plurality of signal lines to which a command is applied; and a first memory device mounted on a first surface of the circuit board, connected to the plurality of signal lines, including a first mode register, and configured to: operate in a standard mode or a mirrored mode, based on a value set in the first mode register, set a value corresponding to the mirrored mode in the first mode register, based on a first command applied to the plurality of signal lines, wherein at least one bit of a plurality of command/address bits in the first command is swapped with at least one bit of a plurality of command/address bits in a second command.