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公开(公告)号:US20170155746A1
公开(公告)日:2017-06-01
申请号:US15287900
申请日:2016-10-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hae-Jung YANG , Seung-Joo LEE , Kwang-Eun GO , Kang-Sik KIM , Jae-Hoon WOO , Jong-Min LEE
CPC classification number: H04M1/026 , G06F1/1637 , G06F1/203 , H04M1/0266 , H04M1/0277 , H04M1/0279 , H05K7/20509 , H05K9/0007
Abstract: A method for manufacturing an electronic device, according to the present disclosure, may include: detecting positions of one or more heat sources, which are disposed in a printed circuit board or in a display of the electronic device, or a path of the heat that is diffused from the heat sources; selecting a heat radiating structure to correspond to the positions of the heat sources or the diffusion path; selecting an adiabatic member or a heat radiating member, which is disposed based the selected heat radiating structure to block or radiate the heat transferred from the heat source; and forming the selected heat radiating structure or disposing the selected adiabatic member or heat radiating member on the periphery of the heat source or on the diffusion path. According to various embodiments of the disclosure, the heat radiation improvement can be maximized and/or improved by improving the structure of a heat radiation path of the electronic device and by selecting and disposing heat radiating members in appropriate positions.
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公开(公告)号:US20180145082A1
公开(公告)日:2018-05-24
申请号:US15635583
申请日:2017-06-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Seungsoo HONG , JeongYun LEE , GeumJung SEONG , HyunHo JUNG , Minchan GWAK , Kyungseok MIN , Youngmook OH , Jae-Hoon WOO , Bora LIM
CPC classification number: H01L27/1108 , H01L21/823821 , H01L27/0924 , H01L27/1104 , H01L27/1116 , H01L29/0649
Abstract: A semiconductor device includes a first active pattern and a second active pattern on a substrate, a first gate electrode and a second gate electrode respectively across the first active pattern and the second active pattern, a first insulation pattern between and separating the first and second gate electrodes, a gate spacer on a sidewall of the first gate electrode, on a sidewall of the second gate electrode, and on a sidewall of the first insulation pattern, and a second insulation pattern between the gate spacer and the sidewall of the first insulation pattern, wherein the first gate electrode, the first insulation pattern, and the second gate electrode are arranged along a first direction, and wherein the gate spacer extends in the first direction.
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