公开(公告)号：US20140016410A1

公开(公告)日：2014-01-16

申请号：US13887830

申请日：2013-05-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Myung-hoon Choi ,  Ki-tae Park ,  Jae-yong Jeong

IPC: G11C16/26

CPC classification number: G11C16/26 ,  G11C11/5642 ,  G11C16/0483

Abstract: A memory device comprises a memory cell that is in one of an erase state and first through N-th program states (N>2). The memory device can be read by determining a first read voltage between the erase state and the first program state based on variations of respective threshold voltage distributions of the erase state and the first program state, and determining one among second through N-th read voltages based on variations in respective threshold voltage distributions of two adjacent program states among the first through N-th program states, and determining remaining read voltages among the second through N-th read voltages based on the one read voltage.

Abstract translation: 存储器件包括处于擦除状态和第一至第N程序状态（N> 2）之一的存储器单元。 可以通过基于擦除状态和第一编程状态的各个阈值电压分布的变化确定擦除状态和第一编程状态之间的第一读取电压来读取存储器件，并且确定第二至第N读取电压 基于所述第一至第N编程状态中的两个相邻编程状态的相应阈值电压分布的变化，以及基于所述一个读取电压确定所述第二至第N读取电压之间的剩余读取电压。