公开(公告)号：US20240321726A1

公开(公告)日：2024-09-26

申请号：US18419715

申请日：2024-01-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinwoo LEE ,  Yubo QIAN ,  Hyunjae KANG ,  Gyeongseop KIM ,  Sutae KIM ,  Jaeyoung PARK ,  Jeonwon JEONG

IPC: H01L23/522 ,  H01L23/528 ,  H01L27/088

CPC classification number: H01L23/5226 ,  H01L23/528 ,  H01L27/088 ,  H01L27/0886

Abstract: An integrated circuit device includes a first conductive pattern disposed on a substrate, a second conductive pattern surrounding a portion of the first conductive pattern and covering a lower portion of a sidewall of the first conductive pattern, an upper insulation structure on the first conductive pattern and the second conductive pattern, and an upper conductive pattern penetrating through the upper insulation structure and extending in a vertical direction, wherein the upper conductive pattern includes a main plug portion overlapping the first conductive pattern and the second conductive pattern in the vertical direction, and a vertical extension extending from a portion of the main plug portion toward the substrate, covering an upper of the upper sidewall of the first conductive pattern, and overlapping the second conductive pattern in the vertical direction, and a dummy contact is formed on a single diffusion break region on the substrate.