CORRELATED DOUBLE SAMPLING CIRCUIT AND IMAGE SENSOR INCLUDING THE SAME
    1.
    发明申请
    CORRELATED DOUBLE SAMPLING CIRCUIT AND IMAGE SENSOR INCLUDING THE SAME 有权
    相关的双重采样电路和包括其的图像传感器

    公开(公告)号:US20130270420A1

    公开(公告)日:2013-10-17

    申请号:US13778591

    申请日:2013-02-27

    CPC classification number: H04N5/378 H04N5/3575

    Abstract: A correlated double sampling (CDS) circuit included in an image sensor includes a sampling unit and a timing controlled band-limitation (TCBL) unit. The sampling unit is configured to generate an output signal by performing a CDS operation with respect to a reset component of an input signal and an image component of the input signal based on a ramp signal, the input signal being provided from a pixel array included in the image sensor. The TCBL unit is connected to the sampling unit, and is configured to remove noise from the output signal based on a timing control signal. The timing control signal is activated during a first comparison duration, in which a first comparison operation is performed with respect to the ramp signal and the reset component of the input signal, and during a second comparison duration, in which a second comparison operation is performed with respect to the ramp signal and the image component of the input signal.

    Abstract translation: 包括在图像传感器中的相关双采样(CDS)电路包括采样单元和定时控制带限(TCBL)单元。 采样单元被配置为通过基于斜坡信号对输入信号的复位分量和输入信号的图像分量执行CDS操作来产生输出信号,该输入信号从包括在 图像传感器。 TCBL单元连接到采样单元,并且被配置为基于定时控制信号从输出信号中去除噪声。 定时控制信号在第一比较持续时间期间被激活,其中相对于斜坡信号和输入信号的复位分量执行第一比较操作,并且在执行第二比较操作的第二比较持续时间期间 相对于斜坡信号和输入信号的图像分量。

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