公开(公告)号：US20230164978A1

公开(公告)日：2023-05-25

申请号：US17882215

申请日：2022-08-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seonhaeng LEE ,  Iloh JANG ,  Jisook HONG

IPC: H01L27/108

CPC classification number: H01L27/10814 ,  H01L27/1085 ,  H01L27/10888

Abstract: The present disclosure refers to memory devices and manufacturing methods thereof. In an embodiment, a memory device includes a memory cell array, a first dummy capacitor, a second dummy capacitor, and a third dummy capacitor. The memory cell array includes gate structures formed on a substrate, first active regions adjacent to the gate structures, gate insulating layers disposed between the gate structures and the first active regions, and cell capacitors connected to the first active regions. The first and second dummy capacitors extend in a first direction and in the vertical direction, and are disposed to be adjacent to the memory cell array in a second direction. The third dummy capacitor extends in the second direction and the vertical direction and is disposed to be adjacent to the memory cell array in the first direction. The memory cell array is disposed between the first and second dummy capacitors.