公开(公告)号：US20190221261A1

公开(公告)日：2019-07-18

申请号：US16323072

申请日：2016-10-07

申请人： HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

发明人： NING GE ,  STEVEN J SIMSKE ,  DAVID GEORGE

IPC分类号： G11C14/00 ,  H01L27/108 ,  H01L27/24 ,  H01L45/00

CPC分类号： G11C14/0045 ,  G11C13/003 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/79 ,  H01L27/10805 ,  H01L27/1085 ,  H01L27/2436 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1608

摘要： In some examples, a hybrid memory device includes multiple memory cells, where a given memory cell of the multiple memory cells includes a volatile memory element having a plurality of layers including electrically conductive layers and a dielectric layer between the electrically conductive layers, and a non-volatile resistive memory element to store different data states represented by respective different resistances of the non-volatile resistive memory element, the non-volatile resistive memory element having a plurality of layers including electrically conductive layers and a resistive switching layer between the electrically conductive layers of the non-volatile resistive memory element.

公开(公告)号：US20190103407A1

公开(公告)日：2019-04-04

申请号：US16038052

申请日：2018-07-17

申请人： Samsung Electronics Co., Ltd.

发明人： Jiyoung KIM ,  Kiseok LEE ,  Bong-Soo KIM ,  Junsoo KIM ,  Dongsoo WOO ,  Kyupil LEE ,  HyeongSun HONG ,  Yoosang HWANG

IPC分类号： H01L27/108

CPC分类号： H01L27/10805 ,  H01L27/0688 ,  H01L27/1085 ,  H01L28/86

摘要： Semiconductor memory devices are provided. A semiconductor memory device includes a substrate. The semiconductor memory device includes a plurality of memory cell transistors vertically stacked on the substrate. The semiconductor memory device includes a first conductive line connected to a source region of at least one of the plurality of memory cell transistors. The semiconductor memory device includes a second conductive line connected to a plurality of gate electrodes of the plurality of memory cell transistors. Moreover, the semiconductor memory device includes a data storage element connected to a drain region of the at least one of the plurality of memory cell transistors.

公开(公告)号：US20180315760A1

公开(公告)日：2018-11-01

申请号：US16014008

申请日：2018-06-21

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED

发明人： Chern-Yow HSU ,  Chen-Jong Wang ,  Chia-Shiung Tsai ,  Shih-Chang Liu ,  Xiaomeng Chen

IPC分类号： H01L27/108 ,  H01L49/02 ,  H01L21/768

CPC分类号： H01L27/10894 ,  H01L21/76877 ,  H01L27/10814 ,  H01L27/1085 ,  H01L27/10897 ,  H01L28/90

摘要： A semiconductor arrangement includes a logic region and a memory region. The memory region has an active region that includes a semiconductor device. The memory region also has a capacitor within one or more dielectric layers over the active region, where the capacitor is over the semiconductor device. The semiconductor arrangement also includes a protective ring within at least one of the logic region or the memory region and that separates the logic region from the memory region. The capacitor has a first electrode, a second electrode and an insulating layer between the first electrode and the second electrode, where the first electrode is substantially larger than other portions of the capacitor.

公开(公告)号：US10074654B1

公开(公告)日：2018-09-11

申请号：US15942439

申请日：2018-03-31

申请人： Winbond Electronics Corp.

发明人： Kazuaki Takesako ,  Kazutaka Manabe ,  Noriaki Ikeda ,  Wei-Che Chang

IPC分类号： H01L27/108

CPC分类号： H01L27/10808 ,  H01L27/10823 ,  H01L27/1085 ,  H01L27/10852 ,  H01L27/10873 ,  H01L27/10876

摘要： Provided is a dynamic random access memory. A plurality of isolation structures is disposed in a substrate to define a plurality of active regions arranged along a first direction. The substrate has a trench extended along the first direction and passing through the plurality of isolation structures and the plurality of active regions. A buried word line is disposed in the trench. A plurality of gate dielectric layers is disposed in the trench of the plurality of active regions to surround and cover the buried word line. A cap layer covers the buried word line. The height of the top surface of the second side of the buried word line is lower than the height of the top surface of the first side of the buried word line passing through the plurality of active regions and the plurality of isolation structures.

公开(公告)号：US10062700B2

公开(公告)日：2018-08-28

申请号：US15458946

申请日：2017-03-14

申请人： UNITED MICROELECTRONICS CORP. ,  Fujian Jinhua Integrated Circuit Co., Ltd.

发明人： Feng-Yi Chang ,  Fu-Che Lee ,  Chien-Cheng Tsai ,  Feng-Ming Huang ,  Hsien-Shih Chu

IPC分类号： H01L27/108

CPC分类号： H01L27/1085 ,  H01L27/108 ,  H01L27/10823 ,  H01L27/10844 ,  H01L27/10847 ,  H01L27/10876 ,  H01L27/10882 ,  H01L27/10888 ,  H01L27/10894

摘要： A manufacturing method of a semiconductor storage device includes forming a plurality of bit line structures on a semiconductor substrate and forming a plurality of storage node contacts disposed between the bit line structures. The method of forming the storage node contacts includes forming a plurality of conductive patterns on the semiconductor substrate followed by performing an etching back process to the conductive patterns for decreasing a thickness of the conductive patterns. The manufacturing method further includes forming a plurality of isolation patterns between the conductive patterns, wherein the isolation patterns are formed after forming the plurality of conductive patterns and before the etching back process. According to the present invention, the storage node contacts are formed by first forming the conductive patterns and then forming the isolation patterns between the conductive patterns, so as to simplify manufacturing process and increase process yield.

公开(公告)号：US20180182460A1

公开(公告)日：2018-06-28

申请号：US15893623

申请日：2018-02-10

申请人： Zeno Semiconductor, Inc.

发明人： Yuniarto Widjaja

IPC分类号： G11C14/00 ,  H01L45/00 ,  H01L29/78 ,  H01L27/24 ,  G11C13/00 ,  H01L27/108

CPC分类号： G11C14/0045 ,  G11C11/21 ,  G11C11/404 ,  G11C11/407 ,  G11C11/4072 ,  G11C13/00 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0069 ,  G11C14/00 ,  G11C14/0027 ,  G11C14/0036 ,  G11C14/009 ,  G11C2013/0073 ,  H01L27/10802 ,  H01L27/1085 ,  H01L27/10879 ,  H01L27/2436 ,  H01L29/7841 ,  H01L45/00 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/146 ,  H01L45/147

摘要： A semiconductor memory cell including a capacitorless transistor having a floating body configured to store data as charge therein when power is applied to the cell, and a non-volatile memory comprising a bipolar resistive change element, and methods of operating.

公开(公告)号：US20180151570A1

公开(公告)日：2018-05-31

申请号：US15881391

申请日：2018-01-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chin-Shan WANG ,  Shun-Yi LEE

IPC分类号： H01L27/108

CPC分类号： H01L27/10832 ,  H01L21/823878 ,  H01L27/10826 ,  H01L27/1085 ,  H01L27/1087 ,  H01L27/10879 ,  H01L27/10891

摘要： A semiconductor device includes a substrate. The semiconductor device further includes a first transistor on the substrate, wherein the first transistor includes a first source/drain electrode. The semiconductor device further includes a second transistor on the substrate, wherein the second transistor includes a second source/drain electrode. The semiconductor device further includes an insulating layer extending into the substrate, wherein the insulating layer directly contacts the first source/drain electrode and the second source/drain electrode.

公开(公告)号：US09893070B2

公开(公告)日：2018-02-13

申请号：US15178903

申请日：2016-06-10

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Chin-Shan Wang ,  Shun-Yi Lee

IPC分类号： H01L23/48 ,  H01L27/108

CPC分类号： H01L27/10832 ,  H01L27/10826 ,  H01L27/1085 ,  H01L27/1087 ,  H01L27/10879 ,  H01L27/10891

摘要： A method of fabricating a semiconductor device. The method includes forming a dummy structure over a substrate, forming conductive features on opposite sides of the dummy gate structure, removing the dummy structure and a portion of the substrate beneath the dummy gate structure to form a trench, and filling the trench with a dielectric material.

公开(公告)号：US09837422B2

公开(公告)日：2017-12-05

申请号：US15179809

申请日：2016-06-10

申请人： SK hynix Inc.

发明人： You-Song Kim ,  Jin-Ki Jung

IPC分类号： H01L27/108 ,  H01L21/311 ,  H01L21/3205 ,  H01L21/764

CPC分类号： H01L27/10885 ,  H01L21/31111 ,  H01L21/32053 ,  H01L21/764 ,  H01L27/1085 ,  H01L27/10891

摘要： A method for fabricating a semiconductor device includes: etching a semiconductor substrate and forming a plurality of bodies separated from one another by a plurality of trenches; forming a protective layer with open parts to expose both sidewalls of each of the bodies; forming buried bit lines in the bodies by silicidizing exposed portions of the bodies through the open parts; and forming a dielectric layer to gap-fill the trenches and define air gaps between adjacent buried bit lines.

公开(公告)号：US09831249B2

公开(公告)日：2017-11-28

申请号：US15271962

申请日：2016-09-21

申请人： HITACHI KOKUSAI ELECTRIC INC.

发明人： Masanori Nakayama ,  Hiroto Igawa

IPC分类号： H01L21/02 ,  H01L27/108

CPC分类号： H01L27/1085 ,  H01J37/32926 ,  H01L21/02175 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02244 ,  H01L21/02247 ,  H01L21/02252 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/321 ,  H01L21/67109 ,  H01L21/67757 ,  H01L21/68742 ,  H01L28/40

摘要： A semiconductor manufacturing method includes preparing a substrate having a metal film formed on a surface thereof; forming an oxide layer by oxidizing a surface of the metal film by plasma of a mixed gas of an oxygen-containing gas and a hydrogen-containing gas; and forming a thin film on the oxide layer by supplying at least an oxidizing gas to the substrate.