公开(公告)号：US20170033048A1

公开(公告)日：2017-02-02

申请号：US15165016

申请日：2016-05-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-Hwa KIM ,  Joon-Gon LEE ,  Inchan HWANG

IPC: H01L23/535 ,  H01L29/66 ,  H01L23/532 ,  H01L21/768 ,  H01L29/78 ,  H01L23/528

CPC classification number: H01L29/66636 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76843 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/76897 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L23/53295 ,  H01L29/66795 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate with lower structures, an insulation layer covering the lower structures on the substrate, a contact hole through the insulation layer partially exposing the substrate, and a contact structure contacting the substrate through the contact hole, the contact structure including a barrier pattern having an upper barrier on an upper portion of a sidewall of the contact hole, and a lower barrier filling a lower portion of the contact hole, and a conductive contact pattern filling an upper portion of the contact hole defined by the upper barrier and the lower barrier.

Abstract translation: 半导体器件包括具有下结构的衬底，覆盖衬底上的下结构的绝缘层，通过绝缘层的部分暴露衬底的接触孔以及通过接触孔接触衬底的接触结构，接触结构包括 在接触孔的侧壁的上部具有上阻挡层的阻挡图案和填充接触孔的下部的下阻挡层以及填充由上阻挡层限定的接触孔的上部的导电接触图案，以及 较低的屏障。