公开(公告)号：US20240332253A1

公开(公告)日：2024-10-03

申请号：US18532742

申请日：2023-12-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KWANYEOB CHAE ,  Ji-Yeon Park

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/538 ,  H10B80/00

CPC classification number: H01L25/0652 ,  H01L23/538 ,  H01L24/16 ,  H10B80/00 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2924/1432 ,  H01L2924/1436

Abstract: A system on chip includes a processor and an input and output circuit including a plurality of input and output elements connected to the processor, wherein the plurality of input and output elements includes: a first input and output element spaced apart from the processor by a first distance; and a second input and output element spaced apart from the processor by a second distance, greater than the first distance, and connected to the processor by a first electrical path extending through a first region of the first input and output element, and wherein the first input and output element is connected to the processor by at least one first terminal provided in a second region that is separate from the first region.

公开(公告)号：US20190043841A1

公开(公告)日：2019-02-07

申请号：US16157642

申请日：2018-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KWANYEOB CHAE ,  Sanghoon JOO ,  Jong-Ryun CHOI ,  Jin-Ho CHOI

IPC: H01L25/065 ,  H01L23/58 ,  H01L23/60 ,  H01L23/00 ,  H01L23/50

Abstract: A semiconductor chip including a plurality of input/output units includes: a plurality of additional pads disposed on a surface of the semiconductor chip, wherein the plurality of additional pads include at least one of a first additional pad to which a ground voltage is applied and a second additional pad to which a power supply voltage is applied; and a plurality of pads disposed on the surface of the semiconductor chip, wherein the plurality of pads include at least one of a first pad to which the ground voltage is applied and a second pad to which the power supply voltage is applied, and further include a third pad through which a signal is input and/or output. The at least one of the first additional pad and the second additional pad is disposed on an input/output unit where the third pad is disposed, among the plurality of input/output units.