公开(公告)号：US11055218B2

公开(公告)日：2021-07-06

申请号：US16422253

申请日：2019-05-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kanchan Joshi ,  Suresh Vishnoi

IPC: G06F12/0804 ,  G06F13/16 ,  G06F13/37

Abstract: An apparatus for accelerating tasks during storage caching and tiering includes a processor. First and second storage units are coupled to the processor. A memory unit is coupled to the processor. The memory unit is configured to receive a write data operation. An amount of dirty data in the first storage unit is determined based on the received write data operation. The dirty data includes data present in the first storage unit to be synced to the second storage unit. A sync rate associated with a read data operation from the first storage unit to the second storage unit is decelerated when the amount of dirty data is less than a first threshold value. A write rate associated with a write data operation to the first storage unit is accelerated when the amount of dirty data is less than the first threshold value.