公开(公告)号：US20250046366A1

公开(公告)日：2025-02-06

申请号：US18420456

申请日：2024-01-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kiryong KIM ,  Inhak Lee ,  Jaesung Choi

IPC: G11C11/418 ,  G11C11/419

Abstract: A memory device includes a cell array including a plurality of static random-access memory (SRAM) cells; a row decoder configured to drive a plurality of word lines of the plurality of SRAM cells based on a row address; a data input/output circuit connected to a plurality of bit lines of the cell array and connected to a sub-power line configured to supply cell voltage to the plurality of SRAM cells; and a word line pulse generator configured to generate a word line pulse with a first pulse width that varies based on the row address and to provide the word line pulse to the row decoder.