公开(公告)号：US20250132271A1

公开(公告)日：2025-04-24

申请号：US18912124

申请日：2024-10-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyojin Hwang ,  Junso Pak ,  Heeseok Lee

IPC: H01L23/64 ,  H01L23/498 ,  H01L25/16 ,  H05K1/11 ,  H05K1/18

Abstract: A semiconductor package includes a printed circuit board including a circuit pattern and a silicon capacitor connected to the circuit pattern, a semiconductor chip mounted on the printed circuit board, and an external connection terminal attached below the printed circuit board, wherein the silicon capacitor is a stacked structure of a plurality of substrate structures, each of the plurality of substrate structures includes a silicon substrate, a capacitor structure, a via electrode penetrating through the silicon substrate around the capacitor structure, an upper bump pad disposed on top of the via electrode, and a lower bump pad disposed below the via electrode, and, in the plurality of substrate structures, neighboring silicon substrates are bonded to each other through the upper bump pad and the lower bump pad facing each other.