公开(公告)号：US10685980B2

公开(公告)日：2020-06-16

申请号：US16268642

申请日：2019-02-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwang Soo Kim ,  Si Wan Kim ,  Jun Hyoung Kim ,  Kyoung Taek Oh ,  Bong Hyun Choi

IPC: H01L29/792 ,  H01L27/11582 ,  H01L27/11565 ,  H01L29/423 ,  H01L27/1157 ,  H01L29/06 ,  H01L27/11573

Abstract: A three-dimensional semiconductor memory device includes: a base substrate; a gate stack structure disposed on the base substrate, and including gate electrodes stacked in a direction substantially perpendicular to a top surface of the base substrate; a penetration region penetrating through the gate stack structure and surrounded by the gate stack structure; and vertical channel structures passing through the gate stack structure. The lowermost gate electrodes among the gate electrodes are spaced apart from each other, and a portion of at least one of the lowermost gate electrodes has a shape bent toward the penetration region.

公开(公告)号：US10991714B2

公开(公告)日：2021-04-27

申请号：US16223761

申请日：2018-12-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwang Soo Kim ,  Jun Hyoung Kim ,  Si Wan Kim ,  Kyoung Taek Oh

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L29/423 ,  H01L27/11573 ,  G11C16/08

Abstract: A three-dimensional semiconductor memory device includes first and second gate stacked structures, disposed on a base substrate, and stacked in a direction perpendicular to a surface of the base plate, the first and second gate stacked structures including gate electrodes spaced apart from each other and stacked; a through region passing through the first and second gate stacked structures and surrounded by the first and second gate stacked structures; and vertical channel structures passing through the first and second gate stacked structures, wherein the first gate stacked structure has first contact pads adjacent to the through region and arranged in a stepped shape, the second gate stacked structure having second contact pads adjacent to the through region and arranged in a stepped shape, at least a portion of the second contact pads overlap the first contact pads on one side of the through region.

公开(公告)号：US20190393240A1

公开(公告)日：2019-12-26

申请号：US16268642

申请日：2019-02-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kwang Soo KIM ,  Si Wan Kim ,  Jun Hyoung Kim ,  Kyoung Taek Oh ,  Bong Hyun Choi

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/1157 ,  H01L29/06 ,  H01L29/423

Abstract: A three-dimensional semiconductor memory device includes: a base substrate; a gate stack structure disposed on the base substrate, and including gate electrodes stacked in a direction substantially perpendicular to a top surface of the base substrate; a penetration region penetrating through the gate stack structure and surrounded by the gate stack structure; and vertical channel structures passing through the gate stack structure. The lowermost gate electrodes among the gate electrodes are spaced apart from each other, and a portion of at least one of the lowermost gate electrodes has a shape bent toward the penetration region.