公开(公告)号：US20240312886A1

公开(公告)日：2024-09-19

申请号：US18669118

申请日：2024-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JAEGWON JANG ,  KYOUNG LIM SUK ,  MINJUN BAE

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49816 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/04 ,  H01L24/16 ,  H01L2224/0401 ,  H01L2224/16227

Abstract: A semiconductor package includes a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate includes an insulating layer, and first, second, and third redistribution patterns disposed in the insulating layer. The first to third redistribution patterns are sequentially stacked in an upward direction and are electrically connected to each other. Each of the first to third redistribution patterns includes a wire portion that extends parallel to the top surface of the redistribution substrate. Each of the first and third redistribution patterns further includes a via portion that extends from the wire portion in a direction perpendicular to the top surface of the redistribution substrate. The second redistribution pattern further includes first fine wire patterns that are less wide than the wire portion of the second redistribution pattern.