公开(公告)号：US10756075B2

公开(公告)日：2020-08-25

申请号：US16167173

申请日：2018-10-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min Gi Hong ,  Yong Kwan Lee

IPC: H01L25/18 ,  H01L23/00 ,  H01L25/00 ,  H01L23/538 ,  H01L23/18 ,  H01L23/31

Abstract: A semiconductor device package-on-package (PoP) includes a first package, a second package, an interposer, a first molding layer, and a second molding layer. The first package includes a first substrate and a first semiconductor chip on the first substrate. The second package is disposed on the first package and includes a second substrate and a second semiconductor chip on the second substrate. The interposer is disposed between the first package and the second package and connects the first package and the second package. A first molding layer fills a space between the first package and the interposer. A second molding layer covers an upper surface of the interposer.

公开(公告)号：US20190157244A1

公开(公告)日：2019-05-23

申请号：US16014533

申请日：2018-06-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min Gi Hong

IPC: H01L25/065 ,  H01L23/538 ,  H01L23/367

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a first semiconductor chip that is on the substrate. The first semiconductor chip includes a first surface facing the substrate, a second surface opposite the first surface and having a first circuit region therein, and a first TSV extending between the first surface and the second surface. An upper semiconductor chip is on the second surface of the first semiconductor chip, is electrically connected with the first semiconductor chip, includes an upper circuit region in a surface thereof facing the second surface of the first semiconductor chip, and does not have a TSV extending through an inside thereof. A thickness of the upper semiconductor chip is greater than a thickness of the first semiconductor chip.