Abstract:
Provided is a modulo scheduling method. The modulo scheduling method includes conducting a search, based on a data dependency graph of a loop, for a recurrence in which a sum of iteration distances between command nodes is less than a predetermined critical value; and determining a processing order of the recurrence.
Abstract:
An apparatus for detecting a source code error location in a mixed-mode program is disclosed. The apparatus may include a compiler, a mapping table generator, a simulator, a comparison data generator and an error location detector. The apparatus extracts low-level data while simulating a verification program and while simulating a reference program. The low-level data is mapped to mapping tables for a verification program and a reference program, and by comparing the tables it is determined if there is an error in the mixed-mode program and if so, where.
Abstract:
There is provided a multiple threads execution processor. The multiple threads execution processor includes a thread selector configured to select a first thread from among a plurality of threads for executing a program code, and a thread executor configured to execute the first thread selected by the thread selector, and execute a second thread selected by the thread selector from among the plurality of threads after completing execution of the first thread.
Abstract:
Provided is a processor with a heterogeneous clustered architecture. The processor comprises a first cluster comprising a first functional unit configured to process a first type of instruction, and a register whose I/O ports are connected to I/O ports of the functional unit; and a second cluster comprising a second functional unit configured to process the first type of instruction and second type of instruction, and a second register whose I/O ports are connected to I/O ports of the second functional unit.