METHOD AND APPARATUS FOR MODULO SCHEDULING
    1.
    发明申请
    METHOD AND APPARATUS FOR MODULO SCHEDULING 审中-公开
    用于模块调度的方法和装置

    公开(公告)号:US20160070594A1

    公开(公告)日:2016-03-10

    申请号:US14687284

    申请日:2015-04-15

    Abstract: Provided is a modulo scheduling method. The modulo scheduling method includes conducting a search, based on a data dependency graph of a loop, for a recurrence in which a sum of iteration distances between command nodes is less than a predetermined critical value; and determining a processing order of the recurrence.

    Abstract translation: 提供了一种模数调度方法。 模调度方法包括基于循环的数据依赖图进行搜索,其中命令节点之间的迭代距离之和小于预定临界值; 并确定复发的处理顺序。

    APPARATUS AND METHOD FOR DETECTING LOCATION OF SOURCE CODE ERROR IN MIXED-MODE PROGRAM
    2.
    发明申请
    APPARATUS AND METHOD FOR DETECTING LOCATION OF SOURCE CODE ERROR IN MIXED-MODE PROGRAM 有权
    用于检测混合模式程序中源码错误位置的装置和方法

    公开(公告)号:US20140075245A1

    公开(公告)日:2014-03-13

    申请号:US14019812

    申请日:2013-09-06

    CPC classification number: G06F11/3624 G06F8/41 G06F11/3612 G06F11/3672

    Abstract: An apparatus for detecting a source code error location in a mixed-mode program is disclosed. The apparatus may include a compiler, a mapping table generator, a simulator, a comparison data generator and an error location detector. The apparatus extracts low-level data while simulating a verification program and while simulating a reference program. The low-level data is mapped to mapping tables for a verification program and a reference program, and by comparing the tables it is determined if there is an error in the mixed-mode program and if so, where.

    Abstract translation: 公开了一种用于在混合模式程序中检测源代码错误位置的装置。 该装置可以包括编译器,映射表生成器,模拟器,比较数据生成器和错误位置检测器。 该装置在模拟验证程序和模拟参考程序的同时提取低级数据。 低级数据被映射到用于验证程序和参考程序的映射表,并且通过比较表来确定混合模式程序中是否存在错误,如果是,则在哪里。

    MULTIPLE THREADS EXECUTION PROCESSOR AND OPERATING METHOD THEREOF
    3.
    发明申请
    MULTIPLE THREADS EXECUTION PROCESSOR AND OPERATING METHOD THEREOF 审中-公开
    多线程执行器及其操作方法

    公开(公告)号:US20150052533A1

    公开(公告)日:2015-02-19

    申请号:US14337633

    申请日:2014-07-22

    CPC classification number: G06F9/4843 G06F9/4881

    Abstract: There is provided a multiple threads execution processor. The multiple threads execution processor includes a thread selector configured to select a first thread from among a plurality of threads for executing a program code, and a thread executor configured to execute the first thread selected by the thread selector, and execute a second thread selected by the thread selector from among the plurality of threads after completing execution of the first thread.

    Abstract translation: 提供了多线程执行处理器。 多线程执行处理器包括线程选择器,其被配置为从用于执行程序代码的多个线程中选择第一线程,以及线程执行器,被配置为执行由线程选择器选择的第一线程,并执行由线程选择器选择的第二线程, 完成执行第一线程之后的多个线程中的线程选择器。

    PROCESSOR WITH HETEROGENEOUS CLUSTERED ARCHITECTURE
    4.
    发明申请
    PROCESSOR WITH HETEROGENEOUS CLUSTERED ARCHITECTURE 审中-公开
    具有异质结构建筑的处理器

    公开(公告)号:US20150006850A1

    公开(公告)日:2015-01-01

    申请号:US14314282

    申请日:2014-06-25

    CPC classification number: G06F9/3891 G06F9/3828

    Abstract: Provided is a processor with a heterogeneous clustered architecture. The processor comprises a first cluster comprising a first functional unit configured to process a first type of instruction, and a register whose I/O ports are connected to I/O ports of the functional unit; and a second cluster comprising a second functional unit configured to process the first type of instruction and second type of instruction, and a second register whose I/O ports are connected to I/O ports of the second functional unit.

    Abstract translation: 提供了具有异构群集体系结构的处理器。 所述处理器包括:第一集群,包括被配置为处理第一类型的指令的第一功能单元和其I / O端口连接到所述功能单元的I / O端口的寄存器; 以及第二集群,包括被配置为处理所述第一类型的指令和第二类型的指令的第二功能单元,以及其I / O端口连接到所述第二功能单元的I / O端口的第二寄存器。

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