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公开(公告)号:US20230262962A1
公开(公告)日:2023-08-17
申请号:US18107589
申请日:2023-02-09
发明人: Miso MYUNG , Keunnam KIM , Euna KIM , Huijung KIM , Sangho LEE
IPC分类号: H10B12/00
CPC分类号: H10B12/482 , H10B12/315 , H10B12/34 , H10B12/02
摘要: An integrated circuit device includes a substrate having an active area, bit line structures on the substrate, the bit line structures including an insulating spacer on each sidewall thereof, a buried contact between the bit line structures, the buried contact being connected to the active area, an insulation capping pattern on each of the bit line structures, a barrier conductive layer covering side surfaces of the insulation capping pattern, and an upper surface and side surfaces of the insulating spacer, and a landing pad electrically connected to the buried contact, the landing pad vertically overlapping one of the bit line structures on the insulation capping pattern and the barrier conductive layer.