公开(公告)号：US20240322807A1

公开(公告)日：2024-09-26

申请号：US18502502

申请日：2023-11-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mukul Agarwal ,  Subodh Prakash Taigor

IPC: H03K5/24 ,  H03K5/00

CPC classification number: H03K5/249 ,  H03K5/00006 ,  H03K19/20

Abstract: A method to control a clock speed of a dynamic comparator may include sensing, by a clock speed control circuit, an output of the dynamic comparator to determine at least one failure in the dynamic comparator. Thereafter, the method may include reducing, by the clock speed control circuit, a frequency of a clock signal used to control the clock speed of the dynamic comparator, based on the determined at least one failure in the dynamic comparator.

公开(公告)号：US12224023B2

公开(公告)日：2025-02-11

申请号：US17979051

申请日：2022-11-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Himanshu Saxena ,  Ankur Gupta ,  Mukul Agarwal

IPC: G11C17/18 ,  G11C17/16

Abstract: Embodiments herein disclose an OTP low power circuit and methods for providing bias voltages using a single regulator. The circuit includes a Bitcell, a diode drop, a charge pump, a combinational logic controller, a program current sink load, and a read current sink load. The Bitcell includes programmable word lines and read lines, and is configured to operate in either a programmable mode or a read mode. The diode drop is configured to provide a second bias voltage to drive the read lines and the single regulator is configured to provide a first bias voltage to drive the WP in the read mode. The charge pump is configured to provide a third bias voltage to drive the WP in the program mode.

公开(公告)号：US20240079070A1

公开(公告)日：2024-03-07

申请号：US17979051

申请日：2022-11-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Himanshu Saxena ,  Ankur Gupta ,  Mukul Agarwal

IPC: G11C17/18 ,  G11C17/16

CPC classification number: G11C17/18 ,  G11C17/16

Abstract: Embodiments herein disclose an OTP low power circuit and methods for providing bias voltages using a single regulator. The circuit includes a Bitcell, a diode drop, a charge pump, a combinational logic controller, a program current sink load, and a read current sink load. The Bitcell includes programmable word lines and read lines, and is configured to operate in either a programmable mode or a read mode. The diode drop is configured to provide a second bias voltage to drive the read lines and the single regulator is configured to provide a first bias voltage to drive the WP in the read mode. The charge pump is configured to provide a third bias voltage to drive the WP in the program mode.