公开(公告)号：US20170168829A1

公开(公告)日：2017-06-15

申请号：US15371408

申请日：2016-12-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jun Mo PARK ,  Ju Hwan KIM ,  Min Seong KIM ,  Yun Ji KIM ,  Taek Hyun KIM ,  Kyung Il SUN ,  Myeong Bo SHIM ,  Dong Hoon YU ,  Hye Yeon CHUNG ,  Sung Hyun HONG

IPC: G06F9/38 ,  G06F12/0875 ,  G06F9/30

CPC classification number: G06F9/384 ,  G06F9/30072 ,  G06F9/30101 ,  G06F9/3832 ,  G06F9/3836 ,  G06F9/3855 ,  G06F12/0875 ,  G06F2212/452

Abstract: A processor includes a first architectural register configured to store first data based on a result of executing an instruction in a first loop, the first architectural register being mapped to one of a plurality of physical registers; and a control unit configured to determine, before execution of the instruction in an n-th loop (n being a natural number greater than 1), at least one of whether the first data stored in the first architectural register is changed and whether a physical register, among the plurality of physical registers, to which the first architectural register is mapped is changed, and, based on a result of determination, execute the instruction in the n-th loop.