公开(公告)号：US20190378590A1

公开(公告)日：2019-12-12

申请号：US16244890

申请日：2019-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNG-HO JOO ,  Gyu-Yeol Kim ,  Jae-Young Lee ,  Chang-Hyun Cho

IPC: G11C29/56 ,  G11C29/10 ,  G01R31/3183 ,  G01R31/317

Abstract: A test interface board includes one or more relay circuits and a synchronization signal generator. The relay circuits duplicate a test signal from an automated test equipment (ATE), apply duplicated test signals to each of a plurality of devices under test (DUTs) through one of corresponding channels, and provide the ATE with a plurality of test result signals received from each of the DUTs in response to the duplicated test signals. The synchronization signal generator receives a plurality of status signals from each of the DUTs and provides a timing synchronization signal to the ATE. Each of the status signals indicates a completion of a test operation in one of the DUTs, the test operation is associated with the test signal, and the synchronization signal generator activates the timing synchronization signal when all of the status signals indicate the completion of the test operation.