公开(公告)号：US20230057630A1

公开(公告)日：2023-02-23

申请号：US17870200

申请日：2022-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seongyeon WOO ,  Minje KIM ,  Woongseop LEE ,  Dongjun YU ,  Jinsoo LIM

IPC: H01L27/11582 ,  H01L23/535 ,  H01L27/11573

Abstract: A device includes: a stack structure including first and second stack regions; first and second separation structures penetrating the stack structure; and vertical structures penetrating the stack structure, including first and second vertical memory structures spaced from the first separation structure by different lengths. The first and second vertical memory structures each include a lower portion, penetrating the first stack region, and an upper portion penetrating the second stack region. A first distance between a center of an upper region of the upper portion of the first vertical memory structure and a center of an upper region of the upper portion of the second vertical memory structure is different from a second distance between a center of an upper region of the lower portion of the first vertical memory structure and a center of an upper region of the lower portion of the second vertical memory structure.

公开(公告)号：US20210183885A1

公开(公告)日：2021-06-17

申请号：US17025120

申请日：2020-09-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seongyeon WOO ,  Sangjun HONG ,  Jinsoo LIM ,  Jisung CHEON

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/11519 ,  H01L27/11556 ,  G11C8/14

Abstract: A semiconductor device includes: a first gate stack including a plurality of first gate electrodes; a second gate stack arranged on the first gate stack and including a plurality of second gate electrodes; and a plurality of channel structures arranged in a plurality of channel holes penetrating the first gate stack and the second gate stack. Each of the channel holes includes a first channel hole portion penetrating the first gate stack and a second channel hole portion penetrating the second gate stack, and a ratio of a second width in the second direction to a first width in the first direction of an upper end of the first channel hole portion is less than a ratio of a fourth width in the second direction to a third width in the first direction of an upper end of the second channel hole portion.