公开(公告)号：US11765880B2

公开(公告)日：2023-09-19

申请号：US17245912

申请日：2021-04-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yanghee Lee ,  Seokhan Park ,  Sungchang Park ,  Boun Yoon ,  Ilyoung Yoon ,  Youngsuk Lee ,  Junseop Lee ,  Seungho Han ,  Jaeyong Han ,  Jeehwan Heo

IPC: H10B12/00

CPC classification number: H10B12/01

Abstract: A method of manufacturing a semiconductor device includes: forming a lower structure that includes a substrate and conductive lines on the substrate, within a chip region and an edge region of the lower structure; forming data storage structures on the chip region of the lower structure; forming dummy structures on the edge region of the lower structure; forming an interlayer insulating layer covering the data storage structures and the dummy structures on the lower structure, the interlayer insulating layer including high step portions and low step portions, an upper end of the low step portions being lower than an upper end of the high step portions; and planarizing the interlayer insulating layer.

公开(公告)号：US20220115379A1

公开(公告)日：2022-04-14

申请号：US17245912

申请日：2021-04-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yanghee Lee ,  Seokhan Park ,  Sungchang Park ,  Boun Yoon ,  Ilyoung Yoon ,  Youngsuk Lee ,  Junseop Lee ,  Seungho Han ,  Jaeyong Han ,  Jeehwan Heo

IPC: H01L27/108

Abstract: A method of manufacturing a semiconductor device includes: forming a lower structure that includes a substrate and conductive lines on the substrate, within a chip region and an edge region of the lower structure; forming data storage structures on the chip region of the lower structure; forming dummy structures on the edge region of the lower structure; forming an interlayer insulating layer covering the data storage structures and the dummy structures on the lower structure, the interlayer insulating layer including high step portions and low step portions, an upper end of the low step portions being lower than an upper end of the high step portions; and planarizing the interlayer insulating layer.