公开(公告)号：US12029048B2

公开(公告)日：2024-07-02

申请号：US17526262

申请日：2021-11-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunmog Park ,  Jungyu Lee ,  Daehwan Kang ,  Sungho Eun

IPC: H10B63/00 ,  G11C13/00 ,  H10N70/00

CPC classification number: H10B63/84 ,  G11C13/0023 ,  H10N70/011 ,  H10N70/882

Abstract: A resistive memory device includes: memory cells overlapping one another in a vertical direction within a cell array region and each including a switching element and a variable resistive element; first conductive lines each being connected to the switching element; a second conductive line connected to the variable resistive element and conductive pads arranged in a connection region and connected to respective one ends of the first conductive lines, respectively, and having different lengths in the second horizontal direction. A lower conductive pad from among the conductive pads includes a first portion covered by an upper conductive pad, and a second portion not covered by the upper conductive pad, and a thickness of each of the first and second portions in the vertical direction is greater than a thickness of each of the first conductive lines in the vertical direction.