公开(公告)号：US20220173081A1

公开(公告)日：2022-06-02

申请号：US17370149

申请日：2021-07-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taeseok CHOI ,  Jihwang KIM ,  Jongbo SHIM

IPC: H01L25/10 ,  H01L23/498 ,  H01L23/31 ,  H01L23/538

Abstract: A semiconductor package includes a lower substrate including a lower passivation layer, a lower pad, element pads and a supporting pad that are disposed on a lower surface of the lower substrate. The lower passivation layer partially covers the lower pad, the element pads and the supporting pad. A semiconductor chip is disposed on an upper surface of the lower substrate. An upper substrate is disposed on the semiconductor chip and is connected to the lower substrate. An encapsulator is disposed between the lower substrate and the upper substrate. An element is disposed on the lower surface of the lower substrate. The element is bonded to the element pads. A lower supporting member is disposed on the lower surface of the lower substrate. A supporting bonding member bonds the lower supporting member to the supporting pad.