公开(公告)号：US20170228190A1

公开(公告)日：2017-08-10

申请号：US15390021

申请日：2016-12-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： VISHAK GUDDEKOPPA

IPC: G06F3/06

CPC classification number: G06F3/0643 ,  G06F3/06 ,  G06F3/061 ,  G06F3/0611 ,  G06F3/0644 ,  G06F3/0658 ,  G06F3/0688

Abstract: A method of providing a file system for an electronic device includes organizing a plurality of Non-Volatile Dual In-Line Memory Module-Ps (NVDIMM-Ps) of a memory device of the electronic device into a plurality of groups based on location information of the NVDIMM-Ps, and creating a single File System Instance (FSI) for each group included in the plurality of groups.

公开(公告)号：US20240028419A1

公开(公告)日：2024-01-25

申请号：US17935124

申请日：2022-09-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： ROSHAN R. NAIR ,  ARUN GEORGE ,  VISHAK GUDDEKOPPA

IPC: G06F9/50 ,  G06K9/62

CPC classification number: G06F9/5083 ,  G06F9/5033 ,  G06K9/6271

Abstract: A method for identifying a plurality of workloads in a heterogenous environment includes collecting a plurality of parameters from at least one layer of a system stack associated with the plurality of workloads, correlating the collected plurality of parameters from different layers of software stack, and creating a feature set based on the correlated plurality of parameters. The method further includes processing the feature set using a successively ordered classifier chain (SOCC) module to identify the presence of the plurality of workloads in the heterogenous environment in a data center.

公开(公告)号：US20180336140A1

公开(公告)日：2018-11-22

申请号：US15981402

申请日：2018-05-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： VISHAK GUDDEKOPPA ,  ARUN GEORGE ,  MUTHA SANJAY MITESH ,  RAKESH NADIG

IPC: G06F12/1036 ,  G06F12/1009 ,  G06F12/02 ,  G06F12/126

Abstract: A method for flash-aware heap memory management includes reserving a contiguous virtual space in a memory space of at least one process with a size equivalent to a size of a flash-based byte addressable device. The method also includes partitioning by a host device the memory space of the flash-based byte addressable device into multiple chunks. Each chunk includes multiple logical segments. The host device receives a memory allocation request from a thread associated with an application. The host device determines at least one chunk from the multiple chunks, including a least free logical segment compared to the other chunks from the multiple chunks. The host device allocates to the thread at least one chunk that includes the least free logical segment.