公开(公告)号：US20240186409A1

公开(公告)日：2024-06-06

申请号：US18372325

申请日：2023-09-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wooyeol MAENG ,  Hyungjin Lee ,  Huichul Shin

IPC: H01L29/78 ,  H01L29/06

CPC classification number: H01L29/7816 ,  H01L29/0649 ,  H01L29/7851

Abstract: An integrated circuit device includes: a semiconductor substrate; first and second conductivity type wells formed in the semiconductor substrate; a source region formed in the second conductivity type well; a drain region formed in the first conductivity type well; a recess insulating layer disposed between the source region and the drain region, and including an upper insulating unit and a lower insulating unit, wherein the upper insulating unit fills an upper substrate recess that extends from an upper surface of the first conductivity type well, and wherein the lower insulating unit fills a lower substrate recess that extends from the upper substrate recess; and a gate electrode layer arranged on the first and second conductivity type wells, and wherein the recess insulating layer has a shape in which both sides thereof are asymmetric with respect to a center of the upper insulating unit.