公开(公告)号：US20170212540A1

公开(公告)日：2017-07-27

申请号：US15216147

申请日：2016-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： GYU-HYEONG CHO ,  YONGJIN LEE ,  DAE-YONG KIM ,  SANGHO KIM

IPC: G05F1/56 ,  H03K21/02 ,  H03K5/1534

CPC classification number: G05F1/56 ,  H03K5/1534 ,  H03K21/026

Abstract: A low dropout voltage (LDO) regulator including: a coarse loop circuit configured to receive an input voltage, generate a coarse code and adjust a coarse current according to the coarse code; a digital controller configured to receive the coarse code and generate a fine loop control signal according to the coarse code; and a fine loop circuit configured to receive the input voltage and the fine loop control signal and adjust a fine current according to the input voltage and the fine loop control signal, wherein the coarse current and the fine current adjust a level of an output voltage.

公开(公告)号：US20240324177A1

公开(公告)日：2024-09-26

申请号：US18604705

申请日：2024-03-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： YONGJIN LEE ,  YOUNGGEUN SONG ,  MINHEE CHO

IPC: H10B12/00 ,  H01L29/786

CPC classification number: H10B12/315 ,  H01L29/78642 ,  H01L29/7869

Abstract: A semiconductor device includes a substrate, a bit line that extends in a first horizontal direction on the substrate, a first mold layer on the bit line, wherein the first mold layer defines a mold opening that exposes a portion of an upper surface of the bit line and extends in a second horizontal direction that intersects the first horizontal direction, a channel layer on the bit line, one or more word lines on sidewalls of the channel layer and that extend in the second horizontal direction, and a gate insulating layer between the word line and the channel layer, where the channel layer includes a first oxide semiconductor layer, a second oxide semiconductor layer, and an auxiliary channel layer between the first oxide semiconductor layer and the second oxide semiconductor layer.