公开(公告)号：US20200105308A1

公开(公告)日：2020-04-02

申请号：US16363307

申请日：2019-03-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNG-HO NA ,  YOUNG-SUN MIN ,  DAE-SEOK BYEON

IPC: G11C5/02 ,  G11C16/04 ,  G11C16/08 ,  H01L25/065

Abstract: A semiconductor package includes first through third memory chips. The first memory chip is arranged on a package substrate, the second memory chip is arranged on the first memory chip, and the third memory chip is arranged between the first memory chip and the second memory chip. Each of the first through third memory chips includes a memory cell array storing data, stress detectors, a stress index generator, and a control circuit. The stress detectors are formed and distributed in a substrate, and detect stacking stress in response to an external voltage to output a plurality of sensing currents. The stress index generator converts the plurality of sensing currents into stress index codes. The control circuit adjusts a value of a feature parameter associated with an operating voltage of a corresponding memory chip, based on at least a portion of the stress index codes.