公开(公告)号：US10910279B2

公开(公告)日：2021-02-02

申请号：US16560516

申请日：2019-09-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： You-Jin Jung ,  Masayuki Terai

IPC: H01L21/82 ,  H01L21/8239 ,  H01L45/00 ,  H01L21/8229

Abstract: A variable resistance memory device includes a memory unit including a first electrode, a variable resistance pattern and a second electrode sequentially stacked on a substrate, a first selection structure on the memory unit, a third electrode structure on the first selection structure, and an anti-fuse including a fourth electrode, a second selection structure and a fifth electrode structure sequentially stacked. The fourth electrode directly contacts the second selection structure, and a bottom of the fourth electrode is lower than a bottom of the second electrode.

公开(公告)号：US10825862B2

公开(公告)日：2020-11-03

申请号：US16394139

申请日：2019-04-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junghyun Cho ,  You-Jin Jung ,  Masayuki Terai ,  Jinchan Yun

IPC: H01L27/24 ,  H01L45/00

Abstract: A variable resistance memory device includes: a substrate including a peripheral region and a core region, the core region including a far region spaced apart from the peripheral region and a near region between the far region and the peripheral region; first conductive lines disposed on the substrate and extending in a first direction; second conductive lines disposed on the first conductive lines and extending in a second direction intersecting the first direction, and memory cells disposed between the first and second conductive lines on the core region. The memory cells include a near memory cell disposed on the near region, and a far memory cell disposed on the far region, wherein a resistance or threshold voltage of the near memory cell, controlling connection of each of the memory cells to a corresponding one of the second conductive lines, is different from that of the far memory cell.