公开(公告)号：US20180122434A1

公开(公告)日：2018-05-03

申请号：US15792973

申请日：2017-10-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young Geun LEE ,  Young Jin CHO ,  Hee Hyun NAM ,  Hyo Deok SHIN ,  Young Kwang YOO

IPC: G11C7/10 ,  G06F13/16 ,  G11C8/06 ,  G06F12/0879

CPC classification number: G11C7/1057 ,  G06F12/0879 ,  G06F13/1673 ,  G11C5/04 ,  G11C7/106 ,  G11C7/1066 ,  G11C8/06 ,  G11C8/12 ,  G11C2207/2254

Abstract: Provided are a memory device and a memory system including the same. The memory device may include a first memory rank including at least one first memory chip, a memory controller configured to provide a command to the first memory rank, at least one data buffer configured to buffer data input to the at least one first memory chip or being output from the at least one first memory chip, and a second memory rank connected to the first memory rank and comprising at least one second memory chip. The first memory rank may provide training data and a data strobe signal to the second memory rank based on a data training command from the memory controller without the training data and the data strobe signal passing through the data buffer. The second memory rank may determine a delay of the data strobe signal based on the training data being detected by the second memory rank.