公开(公告)号：US20240183901A1

公开(公告)日：2024-06-06

申请号：US18523269

申请日：2023-11-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Haejung CHOI ,  Youngbin Kwon ,  Donghun Heo

IPC: G01R31/317 ,  G06F1/08 ,  H03K21/08

CPC classification number: G01R31/31727 ,  G06F1/08 ,  H03K21/08

Abstract: A clock monitoring circuit includes a clock enable signal generator configured to generate an ultra-high frequency clock enable signal based on a clock enable control signal and a reference clock signal, and an ultra-high frequency detector configured to generate an ultra-high frequency determination signal indicating whether a selection clock signal is an ultra-high frequency signal, based on the selection clock signal, the ultra-high frequency clock enable signal, and the reference clock signal.

公开(公告)号：US11467195B2

公开(公告)日：2022-10-11

申请号：US16781333

申请日：2020-02-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cheolhwan Lim ,  Youngbin Kwon ,  Yongjin Lee ,  Haejung Choi ,  Kwangho Kim

IPC: G01R19/165 ,  G01R19/00 ,  H03K17/22 ,  H03K17/284

Abstract: A voltage monitoring circuit includes an initializing circuit that outputs an initialization signal generated by delaying a power supply voltage as much as a first delay time, a switching circuit that outputs a switching signal in response to a reset signal, a voltage detecting circuit that outputs a detection signal based on the power supply voltage and stops an operation in response to the switching signal, and an output circuit that outputs the reset signal based on the initialization signal and the detection signal.