公开(公告)号：US20240395931A1

公开(公告)日：2024-11-28

申请号：US18425196

申请日：2024-01-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seongjae BYEON ,  Younggeun Song ,  Wonsok Lee ,  Juho Lee

IPC: H01L29/78 ,  H01L29/10 ,  H10B12/00

Abstract: A semiconductor device includes a substrate; a channel pattern on the substrate, the channel pattern having sidewalls extending in a vertical direction perpendicular to a surface of the substrate and a lower portion connecting lower portions of two sidewalls facing each other in a horizontal direction; a gate insulation layer pattern and a first conductive layer pattern sequentially stacked laterally on an inner sidewall of the channel pattern; and a second conductive layer pattern contacting at least an uppermost surface and an upper outer sidewall of the channel pattern, the second conductive pattern being spaced apart from the first conductive layer pattern.

公开(公告)号：US20250016992A1

公开(公告)日：2025-01-09

申请号：US18763801

申请日：2024-07-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juho Lee ,  Mintae Ryu ,  Youngseok Park ,  Seongjae Byeon ,  Younggeun Song

IPC: H10B12/00

Abstract: A semiconductor memory device includes a substrate, a conductive line disposed on the substrate, a horizontal channel portion extending in a first direction on the conductive line and partially covering the conductive line, a separation insulating layer disposed on the horizontal channel portion, a gate insulating layer including a first portion on the conductive line and a second portion that extends in a second direction that is perpendicular to the substrate, a vertical channel portion between the gate insulating layer and the separation insulating layer, the vertical channel portion extending in the second direction, and a spacer on the first portion of the gate insulating layer. A first material included in the horizontal channel portion is different from a second material included in the vertical channel portion.