公开(公告)号：US10355007B2

公开(公告)日：2019-07-16

申请号：US15379927

申请日：2016-12-15

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Xiying Costa ,  Dana Lee ,  Yanli Zhang ,  Johann Alsmeier ,  Yingda Dong ,  Akira Matsudaira

IPC: H01L27/11524 ,  H01L27/11582 ,  H01L29/788 ,  H01L27/11556 ,  H01L29/792 ,  H01L27/1157

Abstract: A memory stack structure includes a cavity including a back gate electrode, a back gate dielectric, a semiconductor channel, and at least one charge storage element. In one embodiment, a line trench can be filled with a memory film layer, and a plurality of semiconductor channels can straddle the line trench. The back gate electrode can extend along the lengthwise direction of the line trench. In another embodiment, an isolated memory opening overlying a patterned conductive layer can be filled with a memory film, and the back gate electrode can be formed within a semiconductor channel and on the patterned conductive layer. A dielectric cap portion electrically isolates the back gate electrode from a drain region. The back gate electrode can be employed to bias the semiconductor channel, and to enable sensing of multinary bits corresponding to different amounts of electrical charges stored in a memory cell.